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| (R) SP9601 12-Bit, Low Power Voltage Output D/A Converter s s s s Low Power -- 2mW Voltage Output, 4.5V range Midscale Preset, Zero Volts Out 250KHz Multiplying Bandwidth (4-Quadrant) s Standard 3-Wire Serial Interface s 8-pin (0.15") SOIC and Plastic DIP Packages s 5V supply operation DESCRIPTION... The SP9601 is a very low power 12-Bit Digital-to-Analog Converter. It features 4.5V output swings when using 5 volt supplies. The converter uses a standard 3-wire serial interface compatible with SPITM, QSPITM and MicrowireTM. The output settling-time is specified at 30s. The SP9601 is available in 8-pin 0.15" SOIC and DIP packages, specified over commercial and industrial temperature ranges. Ref In DAC REGISTER LATCH DAC - + VOUT SHIFT REGISTER CS SDI SCK SP9601DS/02 SP9601 12-Bit, Low-Power Voltage Output (c) Copyright 2000 Sipex Corporation 1 ABSOLUTE MAXIMUM RATINGS These are stress ratings only and functional operation of the device at these or any other above those indicated in the operation sections of the specifications below is not implied. Exposure to absolute maximum rating conditions for extended periods of time may affect reliability. VDD - GND ..................................................................... -0.3V,+6.0V VSS - GND .................................................................... +0.3V, -6.0V VDD - VSS ...................................................................................................................... -0.3V, +12.0V VREF ..................................................................................... VSS, VDD DIN ....................................................................................... VSS, VDD Power Dissipation Plastic DIP .......................................................................... 375mW (derate 7mW/C above +70C) Plastic LCC ......................................................................... 375mW (derate 7mW/C above +70C) Small Outline ...................................................................... 375mW (derate 7mW/C above +70C) SPECIFICATIONS (Typical at 25C; TMIN TATMAX; VDD = +5V, VSS = -5V, VREF = +3V; CMOS logic level digital inputs; specifications apply to all grades unless otherwise noted.) PARAMETER DIGITAL INPUTS Logic Levels VIH VIL 4 Quad, Bipolar Coding REFERENCE INPUT Voltage Range Input Resistance ANALOG OUTPUT Gain -B, -K -A, -J Initial Offset Bipolar Voltage Range Bipolar Output Current STATIC PERFORMANCE Resolution Integral Linearity -B, -K -A, -J Differential Linearity -B, -K -A, -J Monotonicity DYNAMIC PERFORMANCE Settling Time Small Signal Full Scale Slew Rate Multiplying Bandwidth STABILITY Gain Bipolar Zero MIN. TYP. MAX. UNITS CONDITIONS 2.4 0.8 Offset Binary 3 8.8 4.5 Volts Volts 6 Volts k Note 5 DIN = 1,877; code dependent VREF = 3V; Note 3 VREF = 3V; Note 3 VREF = 4.5V; Note 3 DIN = 2,048 VREF = 3V VREF = 4.5V 5.0 0.5 12 0.5 1.0 1.0 0.25 3.0 2.0 4.0 5.0 3.0 4.5 LSB LSB LSB LSB Volts mA mA Bits 0.25 0.5 0.5 0.5 1.0 3.0 LSB LSB LSB LSB LSB VREF = 3V; Note 3 VREF = 3V; Note 3 VREF = 4.5V; Note 3 0.25 0.75 0.25 1.0 Guaranteed 4 30 0.3 250 15 15 s s V/s KHz ppm/C ppm/C to 0.024% to 0.024% tMIN to tMAX tMIN to tMAX SP9601DS/02 SP9601 12-Bit, Low-Power Voltage Output (c) Copyright 2000 Sipex Corporation 2 SPECIFICATIONS (continued) (Typical at 25C; TMIN TATMAX; VDD = +5V, VSS = -5V, VREF = +3V; CMOS logic level digital inputs; specifications apply to all grades unless otherwise noted.) PARAMETER POWER REQUIREMENTS VDD -J, -K -A, -B VSS -J, -K -A, -B Power Dissipation SWITCHING CHARACTERISTICS CS Setup Time (tCSS) SCLK Fall to CS Fall Hold Time (tCSH0) SCLK Fall to CS Rise Hold Time (tCSH1) SCLK High Width (tCH) SCLK Low Width (tCL) DIN Setup Time (tDS) DIN Hold Time (tDH) CS High Pulse Width (tCSW) ENVIRONMENTAL AND MECHANICAL Operating Temperature -J, -K -A, -B Storage Package -_N -_S Notes: 1. 2. 3. 4. 5. MIN. TYP. MAX. UNITS CONDITIONS Note 5 +5V, 3%; Note 4, 5 -5V, 3%; Note 4, 5 0.2 0.2 0.2 0.2 2 0.3 0.45 0.3 0.45 mA mA mA mA mW 25 ns 20 ns 0 40 40 50 0 30 ns ns ns ns ns ns 0 -40 -60 +70 +85 +150 8-pin Plastic DIP 8-pin 0.15" SOIC C C C Integral Linearity, for the SP9601, is measured as the arithmetic mean value of the magnitudes of the greatest positive deviation and the greatest negative deviation from the theoretical value for any given input condition. Differential Linearity is the deviation of an output step from the theoretical value of 1 LSB for any two adjacent digital input codes. 1 LSB = 2*VREF/4,096. VREF = 0V. The following power up sequence is recommended: VSS (-5V), Vdd (+5V), VREF. SP9601DS/02 SP9601 12-Bit, Low-Power Voltage Output (c) Copyright 2000 Sipex Corporation 3 PINOUT - 8-PIN PLASTIC DIP & SOIC THEORY OF OPERATION The SP9601 consists of four main functional blocks - the input shift register, DAC register, 12-Bit D/A converter and a bipolar output voltage amplifier, Figure 1. The input shift register is used to convert the serial input data stream to a parallel 12-Bit digital word. The input data is shifted on positive clock (SCLK) edges when the Chip Select (CS) signal is in the "low" state. The MSB is loaded first and LSB last. No shifting of the input data occurs when the Chip Select (CS) signal is in the "high" state. The DAC register is used to store the digital word which is sent to the DAC. Its value is updated on the positive transition of the Chip Select (CS) signal. In order to reduce the DAC full scale output sensitivity to the large weighting of the MSB's found in conventional R-2R resistor ladders, the 3 MSB's are decoded into 8 equally weighted levels. This reduces the contribution of each bit by a factor of 4, thus, reducing the output sensitivity to mismatches in resistors and switches by the same amount. Linearity errors and stability are both improved for the same reasons. The DAC itself is implemented with precision thin-film resistors and CMOS transmission gate switches. The resistor network is laser-trimmed to achieve better than 12-Bit accuracy. The D/ A converter is used to convert the 12-bit input word to a precision voltage. VOUT VDD SCLK DIN 1 2 3 4 8 7 VREF GND VSS CS SP9601 6 5 PIN ASSIGNMENTS Pin 1- VOUT - Voltage Output. Pin 2- VDD - +5V Power Supply Input. Pin 3- SCLK - Serial Clock Input. Pin 4- DIN - Serial Data Input. Pin 5- CS - Chip Select Input. Pin 6- VSS- -5V Power Supply Input. Pin 7- GND - Ground. Pin 8- VREF - Reference Input. FEATURES... The SP9601 is a low power 12-Bit Digital-toAnalog Converter. The converter features 4.5V output swings with 5V supplies. The input coding format used is standard offset binary, Table 1. This Digital-to Analog Converter uses a standard 3-wire interface compatible with SPITM, QSPITM and MicrowireTM. The output settling time is specified at 30s to full 12-bit accuracy when driving a 5K, 50pF load combination. The SP9601 Digital-to-Analog Converter is ideally suited for applications such as ATE, process controllers, robotics and instrumentation. The SP9601 is available in an 8-pin 0.15" SOIC and 0.3" PDIP packages, specified over commercial and industrial temperature ranges. INPUT MSB 1111 1111 1000 1000 0000 0000 1111 1111 0000 0000 0000 0000 LSB 1111 1110 0001 0000 0001 0000 1 LSB = Table 1. Offset Binary Coding OUTPUT VREF - 1 LSB VREF - 2 LSB 0 + 1 LSB 0 -VREF + 1 LSB -VREF 2 VREF 2 12 SP9601DS/02 SP9601 12-Bit, Low-Power Voltage Output (c) Copyright 2000 Sipex Corporation 4 VREF DAC REGISTER DIN 1 40K 40K 3 TO 7 DECODE - + SHIFT REGISTER 12 3 7 9 16 DAC VOUT LATCH 9 Figure 1. Detailed Block Diagram The operational amplifier is a rail-to-rail input, rail-to-rail output CMOS amplifier. It is capable of supplying 5mA of load current in the 3 volt output range. The initial offset voltage is lasertrimmed to improve accuracy. Settling time is 30s for a full scale output transition to 0.024% accuracy. The bipolar voltage output of the SP9601 is created on chip from the DAC output voltage (VDAC) by using an operational amplifier and two feedback resistors connected as shown in Figure 2. This configuration produces a 4.5V bipolar output range with standard offset binary coding, Table 1. USING THE SP9601 External Reference The DAC input resistance is code dependent and is minimum at code 1877 and nearly infinite at code 0. Because of the code-dependent nature of the reference a high quality, low output impedance amplifier should be used to drive the VREF input. Serial Clock and Update Rate The SP9601 maximum serial clock rate (SCLK) is given by 1/(tCH+tCL) which is approximately VREF 12.5 MHz. The digital word update rate is limited by the chip select period, which is 12 X SCLK periods plus the CS high pulse width tCSW. This is equal to a 1 s or 1 MHz update rate. However, the DAC settling time to 12-Bits is 30 s, which for full scale output transitions would limit the update rate to 33 kHz. Logic Interface The SP9601 is designed to be compatible with TTL and CMOS logic levels. However, driving the digital inputs with TTL level signals will increase the power consumption of the part by 300 A. In order to achieve the lowest power consumption use rail-to-rail CMOS levels to drive the digital inputs. Midscale Preset By holding CS pin low during Power-up, the DAC output can be forced to 0V. Following Power-up, the CS pin should be kept low as the first digital word is shifted into the shift register. When CS pin is set high, the digital word in the shift register (loaded by the last 12 clock cycles) is latched into the DAC register. Thus, the DAC can be forced to go from midscale (1000 0000 0000, on Power-up) to any digital state, without entering an unknown state. WHERE VOUT = VOUT VDAC = DIN - + VDAC ( ( DIN 2048 DIN 4096 - 1 x VREF ) ) x VREF Figure 2. Transfer Function SP9601DS/02 SP9601 12-Bit, Low-Power Voltage Output (c) Copyright 2000 Sipex Corporation 5 CS tCSHO tCSS tCH tCL 2 3 4 tCSW tCSH1 12 SCLK tDS 1 tDH DIN DB11 DB10 DB9 DB8 DB0 Figure 3. Timing Diagram SCLK DIN CS N/C SP9601 SK SO I/O SI MICROWIRE PORT Figure 4. Microwire Connection SCLK DIN CS N/C SP9601 SK SO I/O SI SPI PORT CPOL = 0, CPHA = 0 Figure 5. SPI Connection +0.25 lsb DNLE -0.25 lsb +0.25 lsb INLE -0.25 lsb 0 DNLE, INLE Plots CODE 4095 SP9601DS/02 SP9601 12-Bit, Low-Power Voltage Output (c) Copyright 2000 Sipex Corporation 6 PACKAGE: PLASTIC DUAL-IN-LINE (NARROW) E1 E D1 = 0.005" min. (0.127 min.) D A1 = 0.015" min. (0.381min.) A = 0.210" max. (5.334 max). A2 C O eA = 0.300 BSC (7.620 BSC) L e = 0.100 BSC (2.540 BSC) B1 B ALTERNATE END PINS (BOTH ENDS) DIMENSIONS (Inches) Minimum/Maximum (mm) A2 B B1 C D E E1 L O 8-PIN 0.115/0.195 (2.921/4.953) 0.014/0.022 (0.356/0.559) 0.045/0.070 (1.143/1.778) 0.008/0.014 (0.203/0.356) 14-PIN 0.115/0.195 (2.921/4.953) 0.014/0.022 (0.356/0.559) 0.045/0.070 (1.143/1.778) 0.008/0.014 (0.203/0.356) 16-PIN 0.115/0.195 (2.921/4.953) 0.014/0.022 (0.356/0.559) 0.045/0.070 (1.143/1.778) 0.008/0.014 (0.203/0.356) 18-PIN 0.115/0.195 (2.921/4.953) 0.014/0.022 (0.356/0.559) 0.045/0.070 (1.143/1.778) 0.008/0.014 (0.203/0.356) 20-PIN 0.115/0.195 (2.921/4.953) 0.014/0.022 (0.356/0.559) 0.045/0.070 (1.143/1.778) 0.008/0.014 (0.203/0.356) 22-PIN 0.115/0.195 (2.921/4.953) 0.014/0.022 (0.356/0.559) 0.045/0.070 (1.143/1.778) 0.008/0.014 (0.203/0.356) 0.355/0.400 0.735/0.775 0.780/0.800 0.880/0.920 0.980/1.060 1.145/1.155 (9.017/10.160) (18.669/19.685) (19.812/20.320) (22.352/23.368) (24.892/26.924) (29.083/29.337) 0.300/0.325 (7.620/8.255) 0.240/0.280 (6.096/7.112) 0.115/0.150 (2.921/3.810) 0/ 15 (0/15) 0.300/0.325 (7.620/8.255) 0.240/0.280 (6.096/7.112) 0.115/0.150 (2.921/3.810) 0/ 15 (0/15) 0.300/0.325 (7.620/8.255) 0.240/0.280 (6.096/7.112) 0.115/0.150 (2.921/3.810) 0/ 15 (0/15) 0.300/0.325 (7.620/8.255) 0.240/0.280 (6.096/7.112) 0.115/0.150 (2.921/3.810) 0/ 15 (0/15) 0.300/0.325 (7.620/8.255) 0.240/0.280 (6.096/7.112) 0.115/0.150 (2.921/3.810) 0/ 15 (0/15) 0.300/0.325 (7.620/8.255) 0.240/0.280 (6.096/7.112) 0.115/0.150 (2.921/3.810) 0/ 15 (0/15) SP9601DS/02 SP9601 12-Bit, Low-Power Voltage Output (c) Copyright 2000 Sipex Corporation 7 PACKAGE: PLASTIC SMALL OUTLINE (SOIC) (NARROW) E H h x 45 D A O e B A1 L DIMENSIONS (Inches) Minimum/Maximum (mm) A A1 B D E e H h L O 8-PIN 0.053/0.069 (1.346/1.748) 0.004/0.010 (0.102/0.249 0.014/0.019 (0.35/0.49) 0.189/0.197 (4.80/5.00) 0.150/0.157 (3.802/3.988) 0.050 BSC (1.270 BSC) 0.228/0.244 (5.801/6.198) 0.010/0.020 (0.254/0.498) 0.016/0.050 (0.406/1.270) 0/8 (0/8) 14-PIN 0.053/0.069 (1.346/1.748) 0.004/0.010 (0.102/0.249) 0.013/0.020 (0.330/0.508) 16-PIN 0.053/0.069 (1.346/1.748) 0.004/0.010 (0.102/0.249) 0.013/0.020 (0.330/0.508) 0.337/0.344 0.386/0.394 (8.552/8.748) (9.802/10.000) 0.150/0.157 (3.802/3.988) 0.050 BSC (1.270 BSC) 0.228/0.244 (5.801/6.198) 0.010/0.020 (0.254/0.498) 0.016/0.050 (0.406/1.270) 0/8 (0/8) 0.150/0.157 (3.802/3.988) 0.050 BSC (1.270 BSC) 0.228/0.244 (5.801/6.198) 0.010/0.020 (0.254/0.498) 0.016/0.050 (0.406/1.270) 0/8 (0/8) SP9601DS/02 SP9601 12-Bit, Low-Power Voltage Output (c) Copyright 2000 Sipex Corporation 8 ORDERING INFORMATION Model .................................................................................. Temperature Range ....................................................................................... Package Monolithic 12-Bit DAC Voltage Output: SP9601JN ................................................................................ 0C to +70C ........................................................................ 8-pin, 0.3" Plastic DIP SP9601KN ............................................................................... 0C to +70C ........................................................................ 8-pin, 0.3" Plastic DIP SP9601JS ................................................................................ 0C to +70C ............................................................................... 8-pin, 0.15" SOIC SP9601KS ............................................................................... 0C to +70C ................................................................................ 8-pin, 0.15" SOIC SP9601AN ............................................................................... -40C to +85C ................................................................... 8-pin, 0.3" Plastic DIP SP9601BN ............................................................................... -40C to +85C ................................................................... 8-pin, 0.3" Plastic DIP SP9601AS ............................................................................... -40C to +85C .......................................................................... 8-pin, 0.15" SOIC SP9601BS ............................................................................... -40C to +85C ............................................................................ 8-pin, 0.15" SOIC Corporation SIGNAL PROCESSING EXCELLENCE Sipex Corporation Headquarters and Sales Office 22 Linnell Circle Billerica, MA 01821 TEL: (978) 667-8700 FAX: (978) 670-9001 e-mail: sales@sipex.com Sales Office 233 South Hillview Drive Milpitas, CA 95035 TEL: (408) 934-7500 FAX: (408) 935-7600 Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others. SP9601DS/02 SP9601 12-Bit, Low-Power Voltage Output (c) Copyright 2000 Sipex Corporation 9 |
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